1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly to a driving circuit for driving the same.
2. Discussion of the Related Art
A liquid crystal display (LCD) device includes an array substrate, a color filter substrate facing and spaced apart from the array substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate. The array substrate includes a gate line and a data line crossing each other. A thin film transistor (TFT) is connected to the gate line and the data line. The color filter substrate includes a color filter layer and a common electrode.
The LCD device further includes a driving circuit. The driving circuit may be connected to the array substrate according to various attaching processes, such as a tape automated bonding (TAB) method and a chip on glass (COG) method. The structure of the LCD device according to the COG method is relatively simple since the driving circuit directly contacts the array substrate. However, as the size of the LCD device increases, it becomes more difficult to attach the driving circuit to the array substrate. In the TAB method, since the driving circuit is formed on a film of a tape carrier package (TCP), the bonding process is simple. However, an effective area of the array substrate is enlarged. Currently, the TAB method has been widely used as a bonding method of the driving circuit.
In a TAB method, the driving circuit is formed as a driving integrated circuit (IC) and the TCP has input and output leads on the film. The driving IC is attached to inner portions of the input and output leads of the TCP film using a bump through an inner lead bonding (ILB) process. Outer portions of the output leads are attached to the array substrate using an anisotropic conductive film (ACF) through an output lead bonding (OLB) process.
FIG. 1 is a perspective view showing an LCD device according to the related art. FIG. 2 is a magnified view of portion “A” of FIG. 1. As shown in FIGS. 1 and 2, an LCD device includes a liquid crystal panel 10. The liquid crystal panel 10 includes an array substrate 1 and a color filter substrate 3 facing and spaced apart from each other. A liquid crystal layer (not shown) is formed between the array substrate 1 and the color filter substrate 3. A black matrix (not shown) and a color filter layer (not shown) are formed on the color filter substrate 3. In addition, a gate line “GL” and a data line “DL” are formed on the array substrate 1. The gate line GL crosses the data line DL to define a pixel region “P.” A thin film transistor (TFT) (not shown) is connected to the gate line GL and the data line DL at each pixel region P.
The LCD device also includes a plurality of driving circuits 7 and 11. Data pads (not shown) and gate pads (not shown) for connection with the driving circuits 7 and 11 are formed at a periphery of the array substrate 1. Each gate pad is connected to a gate link line “GLK” extending from the gate line GL. Each data pad is connected to a data link line “DLK” extending from the data line DL. The driving circuit includes tape carrier packages (TCPs) 9 and printed circuit boards (PCBs) 5. The TCPs 9 are connected to the corresponding gate and data pads. Each TCP 9 includes a film and one of a data driving circuit 7 and a gate driving circuit 11 as an integrated circuit (IC) on the film. The TCPs 9 are also connected to the printed circuit boards (PCBs) 5. In addition, each TCP 9 includes a plurality of output leads 39a and a plurality of input leads 39b on the film. The plurality of output leads 39a correspond to one of the gate pads and the data pads on the array substrate 1. Accordingly, the plurality of output leads 39a is disposed at an opposite side of the plurality of input leads 39b. Even though not shown in FIGS. 1 and 2, the plurality of input leads 39b correspond to PCB pads on each PCB 5. As a result, the PCBs 5 are electrically connected to the array substrate 1 through the TCPs 9 and supply signals to the liquid crystal panel 10.
The plurality of output leads 39a are equally spaced apart from one another. Further, the gate pads and the data pads corresponding to the plurality of output leads 39a are also equally spaced apart from one another so that the gate pads and the data pads correspond one-to-one with the plurality of output leads 39a. Similarly, the plurality of input leads 39b are equally spaced apart from one another, and the PCB pads are equally spaced apart from one another so that the plurality of input leads 39b and the PCB pads are in one-to-one correspondence.
The gate pads, the data pads, and the PCB pads may be divided into groups corresponding to one TCP 9. Two alignment marks are formed at both sides of the plurality of output leads 39a, and two marks are formed at both sides of each group of the gate pads and the data pads. The alignment marks are used to align the plurality of output leads 39a of each TCP 9 and one of the gate pads and the data pads of the liquid crystal panel 10. Similarly, two alignment marks are formed at both sides of the plurality of input leads 39b, and two alignment marks are formed at both sides of each group of the PCB pads to align the plurality of input leads 39b of each TCP 9 and the PCB pads of the PCB 5. For example, two TCP alignment marks 41a and 41b are formed at both sides of the plurality of output leads 39a of each TCP 9. Similarly, two panel alignment marks 42a and 42b are formed at both sides of each group of the gate pads and the data pads of the liquid crystal panel 10.
FIG. 3A is a plan view showing a portion of a TCP of an LCD device according to the related art. FIG. 3B is a plan view showing a portion of a liquid crystal panel of the LCD device according to the related art. Even though FIGS. 3A and 3B show a plurality of output leads of the TCP and a plurality of gate pads of the liquid crystal panel, respectively, FIGS. 3A and 3B may also represent a plurality of input leads of the TCP and a plurality of data pads of the liquid crystal panel, respectively. As shown in FIGS. 3A and 3B, a plurality of output leads 39a are formed in a first portion 45a of a TCP and a plurality of gate (or data) pads 43 are formed in a second portion 45b of a liquid crystal panel. The plurality of output leads 39a correspond one-to-one with the plurality of gate (or data) pads 43. In addition, the plurality of output leads 39a are equally spaced apart from one another. Similarly, the plurality of gate (or data) pads 43 are equally spaced apart from one another. First and second TCP alignment marks 41a and 41b are formed at both sides of the plurality of output leads 39a while first and second panel alignment marks 42a and 42b are formed at both sides of the plurality of gate (or data) pads 43. The first and second TCP alignment marks 41a and 41b correspond to the first and second panel alignment marks 42a and 42b, respectively.
The process for attaching the TCP to the liquid crystal panel will be illustrated hereinafter. The TCP and the liquid crystal panel are disposed using the first and second TCP alignment marks 41a, 41b and the first and second panel alignment marks 42a, 42b such that the plurality of output leads 39a overlap the plurality of gate (or data) pads 43. An anisotropic conductive film (ACF), for example, is interposed between the plurality of output leads 39a and the plurality of gate (or data) pads 43. Next, the TCP is pressed on the liquid crystal panel with heat. However, the first and second TCP alignment marks 41a and 41b may not be properly aligned with the first and second panel alignment marks 42a and 42b due to an accumulated alignment error during the fabrication process. Moreover, since the TCP expands by the pressure and the heat during the attaching process, the mismatch between the TCP alignment marks 41a, 41b and the panel alignment marks 42a, 42b may become worse. As a result, when the TCP and the liquid crystal panel are aligned using the first and second TCP alignment marks 41a, 41b and the first and second panel alignment marks 42a, 42b, the plurality of output leads 39a and the plurality of gate (or data) pads 43 may be misaligned. Similarly, the plurality of input leads 39b (of FIG. 2) and the plurality of PCB pads may be misaligned.
According to recent trends in reducing the cost of materials, the width of TCPs have decreased from about 48 mm to about 35 mm. Accordingly, a gap distance between two adjacent output leads 39a and between two adjacent gate (or data) pads 43 also decreased. As the gap distance decreases, misalignment during the attachment of the TCP and the liquid crystal panel increases. The misalignment causes deterioration in display quality of the LCD device. In addition, since the misaligned TCP and the liquid crystal panel need to be re-attached, fabrication yield is reduced and production cost increases.